Senior ASIC RTL & Security IP Engineer

Senior ASIC RTL & Security IP Engineer
Porto
Porto, Porto, Portugal

A leading chip design firm in Porto seeks a passionate Senior ASIC Digital Design or Verification Engineer. In this role, you will design RTL in Verilog/System Verilog for Security Applications and collaborate with a diverse international team. You will enhance IP cores' performance and security and drive innovation in Cyber
Security and AI. A strong background in RTL design and verification is required, along with an MSc or Ph
D in a relevant field.

#J-18808-Ljbffr