Staff Analog Design Engineer Oeiras

Staff Analog Design Engineer
Oeiras
Oeiras, Distrito de Lisboa, Portugal

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from
- driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of
- performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and accomplished analog design engineer with a strong foundation in CMOS circuit fundamentals and a proven track record in developing
- speed,
- performance analog and
- signal IP. Your curiosity fuels your drive to stay at the leading edge of semiconductor technology, and you thrive in a collaborative,
- paced R&D environment. With a deep understanding of Ser
Des architectures and
- circuits, you eagerly tackle complex design challenges and translate Ser
Des standards into robust, innovative solutions. You are comfortable navigating the latest Fin
FET and GAA process nodes and have
- on experience with advanced IC design tools.

What You’ll Be Doing:

• Reviewing Ser
  Des standards and translating them into precise analog
  - block specifications.
• Identifying and refining circuit architectures to meet stringent power, area, and performance targets.
• Proposing and executing efficient design and verification strategies utilizing advanced simulator features.
• Overseeing physical layout to minimize parasitics, mitigate device stress, and address process variation.
• Presenting simulation and characterization data for peer and customer review, ensuring design transparency and
  - in.
• Documenting critical design features, test plans, and
  - silicon update proposals to ensure robust knowledge sharing and traceability.
• Consulting on electrical characterization and proposing innovative solutions for
  - silicon design updates within Ser
  Des IP products.

The Impact You Will Have:

• Drive the development of
  - leading Multi-Gbps NRZ & PAM4 Ser
  Des IP, enabling
  - generation data communication systems.
• Advance Synopsys’ position as a leader in
  - speed analog and
  - signal design for Fin
  FET and GAA technologies.
• Enhance the performance, reliability, and manufacturability of Synopsys’ Ser
  Des solutions through innovative circuit techniques and rigorous verification.
• Facilitate seamless integration of analog and digital design efforts, contributing to a cohesive and
  - performing
  - functional team.
• Deliver robust,
  - focused IP that meets or exceeds quality and performance expectations in
  - world applications.
• Mentor and inspire junior engineers, fostering a culture of technical excellence and continuous learning.

What You’ll Need:

• BE + 5 years or MTech + 4 years of relevant experience in Electrical Engineering, Computer Engineering, or a related field.
• Expertise in
  - level circuit design and strong CMOS design fundamentals.
• Detailed design experience with at least two Ser
  Des
  - circuits (e. g. , receive equalizers, samplers, drivers, serializers/deserializers, VCO, PLL, DLL, bandgap reference, ADC, DAC) and familiarity with several others.
• Knowledge of ESD protection strategies, layout techniques, and custom digital design for
  - speed logic paths.
• Proficiency with schematic entry, physical layout, and design verification tools;
  - on experience with
  - speed circuit layout is a plus.
• Familiarity with SPICE simulators, Verilog-A for analog modeling, and scripting languages such as TCL, Perl, C, Python, or MATLAB.
• Strong understanding of design for reliability, including EM, IR, aging, and layout effects (matching, proximity, etc. ).
• Excellent written and verbal communication skills for documentation and technical presentations.

Who You Are:

• Collaborative team player who values diversity and open communication.
• Self-motivated and proactive in tackling technical challenges and exploring new design methodologies.
• Detail-oriented, with a passion for quality and continuous improvement.
• Adaptable and resilient in a dynamic,
  - paced R&D environment.
• Effective communicator who can clearly articulate complex technical concepts to a variety of stakeholders.

The Team You’ll Be A Part Of:

You’ll join a
- class analog and
- signal R&D team focused on developing
- edge Multi-Gbps Ser
Des IP for the latest semiconductor process nodes. Our team brings together experts in analog, digital, and layout design, all working collaboratively in a supportive and innovative environment. With access to
-
-
- art IC design tools and custom
- house solutions, you’ll contribute to a culture of excellence, knowledge sharing, and mutual respect.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and
- monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.